Complexity Reduction with VSM Temporal Engineering: Code Comparison

VSM Temporal Engineering reduces complexity by providing a compact and efficient representation for logic.

• The image is a photo I took of an application implemented in the standard ad-hoc software architecture (SASA) using if-then-else and case/switch logic.
• The printout is taped together in this three-by-four matrix representing the distribution of logic throughout the program.

This is standard ad-hoc software development (Spatial Engineering). Every software developer experiences this distribution of logic and new developers coming into a company get to learn their craft by debugging issues from customers. "It's the current standard." That single sheet of paper on the right is the same application logic defined in the Temporal Matrix. On the upper half of the page, next to the photo, is the Temporal Vector Engine that manages the Temporal Matrix. How's that for compact?

As Ann-Marie Scarborough pointed out in her recent post that engine provides a 100% trace that can be turned on and off. Given an opportunity to choose, are developers going to go with a Standard Ad-hoc Software Architecture (SASA) or with the VSM Temporal Engineering software architecture COSA?